/*
 * The Open Source Unix Installer
 *
 * The MIT License
 *
 * Copyright 2011-2012 Andrey Pudov.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */

/*
 * @author  Andrey Pudov    <andrey@andreypudov.com>
 * @version 0.00.00
 * @name    processor.h
 * @date:   Jun 17, 2012
 */

#ifndef INSTALLER_PROC_PROCESSOR_H_
#define INSTALLER_PROC_PROCESSOR_H_

#include <stdio.h>
#include <stdlib.h>   /* calloc */
#include <stdbool.h>

#include <sys/types.h>

#ifdef __cplusplus
extern "C" {
#endif

typedef enum   _Vendor    Vendor;
typedef enum   _Flags     Flags;

enum _Vendor {
    AMD_IS_BETTER,  /* AMDisbetter! */    /* early engineering samples of AMD K5 */
    AUTHENTIC_AMD,  /* AuthenticAMD */    /* AMD */
    CENTAUR_HAULS,  /* CentaurHauls */    /* Centaur */
    CYRIX_INSTEAD,  /* CyrixInstead */    /* Cyrix */
    GENUINE_INTEL,  /* GenuineIntel */    /* Intel */
    TRAANSMETA_CPU, /* TransmetaCPU */    /* Transmeta */
    GENUINE_TM_X86, /* GenuineTMx86 */    /* Transmeta */
    GEODE_BY_NSC,   /* Geode by NSC */    /* National Semiconductor */
    NEX_GEN_DRIVEN, /* NexGenDriven */    /* NexGen */
    RISE_RISE_RISE, /* RiseRiseRise */    /* Rise */
    SIS_SIS_SIS,    /* Sis SiS SiS  */    /* SiS */
    UMC_UMC_UMC,    /* UMC UMC UMC  */    /* UMC */
    VIA_VIA_VIA,    /* VIA VIA VIA  */    /* VIA */
    VORTEX_86_SOC   /* Vortex86 SoC */    /* Vortex */
};

enum _Flags {
	/* zero-based enumeration */

	/* ECX feauture flags */
    SSE3,          /* Streaming SIMD Extensions 3 */
    PCLMULDQ,      /* PCLMULDQ Instruction */
	DTES64,        /* 64-Bit Debug Store */
	MONITOR,       /* MONITOR/MWAIT */
	DS_CPL,        /* CPL Qualified Debug Store */
	VMX,           /* Virtual Machine Extensions */
	SMX,           /* Safer Mode Extensions */
	EIST,          /* Enhanced Intel SpeedStep(R) Technology */
	TM2,           /* Thermal Monitor 2 */
	SSSE3,         /* Supplemental Streaming SIMD Extensions 3 */
	CNXT_ID,       /* L1 Context ID */
    RESERVED_1,
	FMA,           /* Fused Multiply Add */
	CX16,          /* CMPXCHG16B */
	xTPR,          /* xTPR Update Control */
	PDCM,          /* Perfmon and Debug Capability */
    RESERVED_2,
	PCID,          /* Process Context Identifiers */
	DCA,           /* Direct Cache Access */
	SSE4_1,        /* Streaming SIMD Extensions 4.1 */
	SSE4_2,        /* Streaming SIMD Extensions 4.2 */
	x2APIC,        /* Extended xAPIC Support */
	MOVBE,         /* MOVBE Instruction */
	POPCNT,        /* POPCNT Instruction */
	TSC_DEADLINE,  /* Time Stamp Counter Deadline */
	AES,           /* AES Instruction Extensions */
	XSAVE,         /* XSAVE/XSTOR States */
	OSXSAVE,       /* OS-Enabled Extended State Management */
	AVX,           /* Advanced Vector Extensions */
	F16C,          /* 16-bit floating-point conversion instructions */
	RDRAND,        /* RDRAND instruction supported */
    NOT_USED_1,

    /* EDX feauture flags */
	FPU,           /* Floating-point Unit On-Chip */
	VME,           /* Virtual Mode Extension */
	DE,            /* Debugging Extension */
	PSE,           /* Page Size Extension */
	TSC,           /* Time Stamp Counter */
	MSR,           /* Model Specific Registers */
	PAE,           /* Physical Address Extension */
	MCE,           /* Machine-Check Exception */
	CX8,           /* CMPXCHG8 Instruction */
	APIC,          /* On-chip APIC Hardware */
    RESERVED_3,
	SEP,           /* Fast System Call */
	MTRR,          /* Memory Type Range Registers */
	PGE,           /* Page Global Enable */
	MCA,           /* Machine-Check Architecture */
	CMOV,          /* Conditional Move Instruction */
	PAT,           /* Page Attribute Table */
	PSE_36,        /* 36-bit Page Size Extension */
	PSN,           /* Processor serial number is present and enabled */
	CLFSH,         /* CLFLUSH Instruction */
	DS,            /* Debug Store */
    RESERVED_4,
	ACPI,          /* Thermal Monitor and Software Controlle Clock Facilities */
	MMX,           /* MMX technology */
	FXSR,          /* FXSAVE and FXSTOR Instruction */
	SSE,           /* Streaming SIMD Extensions */
	SSE2,          /* Streaming SIMD Extensions 2 */
	SS,            /* Self-Snoop */
	HTT,           /* Multi-Threading */
	TM,            /* Thermal Monitor */
    RESERVED_5,
	PBE            /* Pending Break Enable */
};

char* installer_processor_get_name();
char* installer_processor_get_vendor();
int   installer_processor_get_vendor_id();
int   installer_processor_get_stepping();
int   installer_processor_get_model();
int   installer_processor_get_family();
int*  installer_processor_get_flags();

#ifdef __cplusplus
}
#endif

#endif /* INSTALLER_PROC_PROCESSOR_H_ */
